EE Intellectual property (IP)
Highly efficient IP for rapid development and prototyping
Complex FFTs and IFFTs performing parallel processing from 2-point to 200-points. Implementations include radix-2, mixed radix, composite N prime factor, and general factor. The IP repository also includes TCL scripts that can generate any composite N FFT/IFFT.
FIR and IIR filters that provide real and complex filtering for various lengths of inputs. These IP modules were written in general HDL for ease of portability to and FPGA/ASIC family.
FIR & IIR Filters
Polyphase Filters performing interpolation and decimation. Each branch is implemented as Direct Form II and optiminized for speed and portability.
Channelizers (both synthesis and analysis) of various lengths processing complex inputs with parallel in parallel out achitecture
Frequency, amplitude, and phase modulators including: FM, AM, FSK, BPSK, QPSK, 8PSK, 16PSK, 16QAM, 32PSK, 32QAM, 64QAM, 128QAM, 256QAM
Frequency, amplitude, and phase demodulators including: FM, AM, FSK, BPSK, QPSK, 8PSK, 16PSK, 16QAM, 32PSK, 32QAM, 64QAM, 128QAM, 256QAM
High Speed Serial I/O
JESD204B & C modules, PCIe, XAUI, and other SERDES for high speed serial I/O
BCH, Reed-Solomon, and LDPC encoders and and decoders
Carrier & Symbol Rate Detection
Carrier and symbol rate detection via non-linearity techniques